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Teensy Audio Shield

andy, May 1, 2026May 1, 2026

Pinouts and wiring for hard wiring as opposed to stacking.

Audio Shield
Signal
Rev D, D2
(Teensy 4.x)
Rev C
(Teensy 3.x)
Required ForFunction
MCLK23
(MCLK1)
11
(MCLK)
AudioAudio Master Clock, 11.29 MHz
BCLK21
(BCLK1)
9
(BCLK)
AudioAudio Bit Clock, 1.41 or 2.82 MHz
LRCLK20
(LRCLK1)
23
(LRCLK)
AudioAudio Left/Right Clock, 44.1 kHz
DIN7
(OUT1A)
22
(OUT)
Audio OutputAudio Data from Teensy to Audio Shield
Goes to both headphone jack and Line-Out pins
DOUT8
(IN1)
13
(IN)
Audio InputAudio Data from Audio Shield to Teensy
Comes from either Microphone or Line-In pins
SCL1919Audio ConfigControl Clock (I2C)
SDA1818Audio ConfigControl Data (I2C)
SCK1314Optional Data
SD or MEM
Data Storage (SPI) Clock
MISO1212Optional Data
SD or MEM
Data Storage (SPI) from SD/MEM to Teensy
MOSI117Optional Data
SD or MEM
Data Storage (SPI) from Teensy to SD/MEM
SDCS1010Optional Data
SD Card
Chip Select (SPI) for SD Card
MEMCS66Optional Data
MEM Chip
Chip Select (SPI) for Memory Chip
Vol15 / A115 / A1Optional KnobVolume Thumbwheel (analog signal)

GND — connect at least one GND from the Teensy to a GND pad on the shield. There are multiple GNDs available on each; using two (one near power, one near signal) helps reduce noise.

I²S (audio bus) — the five teal wires carry the actual audio. MCLK is the master clock the codec needs to run; BCLK and LRCLK are the bit and word-select clocks; TX sends audio to the shield’s DAC, and RX receives audio from the shield’s ADC.

I²C (control bus) — pins 18/19 let the Teensy configure the SGTL5000 (volume, sample rate, input routing, etc.) via the AudioControlSGTL5000 object in the Teensy Audio Library.

3.3V — the SGTL5000 runs on 3.3V. The Teensy 4.0’s 3V3 pin can supply it directly. Don’t connect the shield’s power to 5V — the codec is not 5V tolerant.

If you’re using the Teensy Audio Library, the AudioMemory() call and AudioControlSGTL5000 object handle all the I²C setup automatically once the wiring matches these pins.

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